Changeset 124bc22 in mainline

Timestamp:

2019-04-04T18:08:51Z (5 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

5d97627

Parents:

e064102

Message:

Reorganize interrupt and IRQ handling on mips32

This allows msim to use MIPS CPU interrupt numbers as IRQ numbers and
Malta to use ISA IRQ numbers as IRQ numbers. Common code can still
register MIPS CPU interrupts by their respective numbers.

Location:

kernel/arch/mips32

Files:

• include/arch/exception.h (modified) (1 diff)
• include/arch/mach/malta/malta.h (modified) (2 diffs)
• include/arch/machine_func.h (modified) (1 diff)
• src/exception.c (modified) (3 diffs)
• src/interrupt.c (modified) (5 diffs)
• src/mach/malta/malta.c (modified) (4 diffs)
• src/mach/msim/msim.c (modified) (2 diffs)

kernel/arch/mips32/include/arch/exception.h

@@ -57 +57 @@
 #define EXC_VCED   31
 
+#define INT_SW0    0
+#define INT_SW1    1
+#define INT_HW0    2
+#define INT_HW1    3
+#define INT_HW2    4
+#define INT_HW3    5
+#define INT_HW4    6
+#define INT_TIMER  7
+
+#define INTERRUPTS    8
+#define HW_INTERRUPTS (INTERRUPTS - 3)
+
+typedef void (* int_handler_t)(unsigned int);
+extern int_handler_t int_handler[];
+
 extern void exception(istate_t *istate);
 extern void tlb_refill_entry(void);

kernel/arch/mips32/include/arch/mach/malta/malta.h

@@ -39 +39 @@
 #include <arch/machine_func.h>
 #include <arch/mm/page.h>
+#include <typedefs.h>
 
 #define MALTA_PCI_BASE          PA2KSEG1(0x18000000UL)
@@ -47 +48 @@
 
 #define TTY_BASE                (MALTA_PCI_BASE + 0x3f8)
-#define TTY_CPU_INT             2
 #define TTY_ISA_IRQ             4
 
-#define GT64120_PCI0_INTACK     (MALTA_GT64120_BASE + 0xc34)
+#define GT64120_PCI0_INTACK     ((ioport32_t *) (MALTA_GT64120_BASE + 0xc34))
 
 extern struct mips32_machine_ops malta_machine_ops;

kernel/arch/mips32/include/arch/machine_func.h

@@ -43 +43 @@
 
 #include <typedefs.h>
+#include <stdbool.h>
 
 struct mips32_machine_ops {

kernel/arch/mips32/src/exception.c

@@ -47 +47 @@
 #include <symtab.h>
 #include <log.h>
+#include <arch/machine_func.h>
 
 static const char *exctable[] = {
@@ -174 +175 @@
 
         unsigned int i;
-        for (i = 0; i < 8; i++) {
+        for (i = 0; i < INTERRUPTS; i++) {
 
                 /*
@@ -183 +184 @@
                  */
                 if (im & ip & (1 << i)) {
-                        irq_t *irq = irq_dispatch_and_lock(i);
-                        if (irq) {
-                                /*
-                                 * The IRQ handler was found.
-                                 */
-                                irq->handler(irq);
-                                if (irq->cir)
-                                        irq->cir(irq->cir_arg, i);
-                                irq_spinlock_unlock(&irq->lock, false);
-                        } else {
+                        if (int_handler[i])
+                                int_handler[i](i);
+                        else {
                                 /*
                                  * Spurious interrupt.

kernel/arch/mips32/src/interrupt.c

@@ -41 +41 @@
 #include <ipc/sysipc.h>
 
-#define IRQ_COUNT   8
-#define TIMER_IRQ   7
-
-function virtual_timer_fnc = NULL;
-static irq_t timer_irq;
-
 // TODO: This is SMP unsafe!!!
 
@@ -52 +46 @@
 static unsigned long nextcount;
 static unsigned long lastcount;
+
+/** Table of interrupt handlers. */
+int_handler_t int_handler[INTERRUPTS] = {};
 
 /** Disable interrupts.
@@ -113 +110 @@
 }
 
-static irq_ownership_t timer_claim(irq_t *irq)
-{
-        return IRQ_ACCEPT;
-}
-
-static void timer_irq_handler(irq_t *irq)
+static void timer_interrupt_handler(unsigned int intr)
 {
         if (cp0_count_read() < lastcount)
@@ -135 +127 @@
         cp0_compare_write(nextcount);
 
-        /*
-         * We are holding a lock which prevents preemption.
-         * Release the lock, call clock() and reacquire the lock again.
-         */
-        irq_spinlock_unlock(&irq->lock, false);
         clock();
-        irq_spinlock_lock(&irq->lock, false);
-
-        if (virtual_timer_fnc != NULL)
-                virtual_timer_fnc();
 }
 
@@ -150 +133 @@
 void interrupt_init(void)
 {
-        irq_init(IRQ_COUNT, IRQ_COUNT);
-
-        irq_initialize(&timer_irq);
-        timer_irq.inr = TIMER_IRQ;
-        timer_irq.claim = timer_claim;
-        timer_irq.handler = timer_irq_handler;
-        irq_register(&timer_irq);
+        int_handler[INT_TIMER] = timer_interrupt_handler;
 
         timer_start();
-        cp0_unmask_int(TIMER_IRQ);
+        cp0_unmask_int(INT_TIMER);
 }
 

kernel/arch/mips32/src/mach/malta/malta.c

@@ -42 +42 @@
 #include <genarch/srln/srln.h>
 #include <arch/interrupt.h>
+#include <stdbool.h>
+#include <byteorder.h>
+#include <log.h>
 
 static void malta_init(void);
@@ -68 +71 @@
 #endif
 
-#ifdef CONFIG_NS16550
-static void tty_clear_interrupt(void *arg, inr_t inr)
+static void malta_isa_irq_handler(unsigned int i)
 {
-        (void) pio_read_8((ioport8_t *) GT64120_PCI0_INTACK);
+        uint8_t isa_irq = host2uint32_t_le(pio_read_32(GT64120_PCI0_INTACK));
+        irq_t *irq = irq_dispatch_and_lock(isa_irq);
+        if (irq) {
+                irq->handler(irq);
+                irq_spinlock_unlock(&irq->lock, false);
+        } else {
+#ifdef CONFIG_DEBUG
+                log(LF_ARCH, LVL_DEBUG, "cpu%u: spurious IRQ (irq=%u)",
+                    CPU->id, isa_irq);
+#endif
+        }
         pic_eoi();
 }
-#endif
 
 void malta_init(void)
 {
+        irq_init(16, 16);
+
         i8259_init((i8259_t *) PIC0_BASE, (i8259_t *) PIC1_BASE, 2, 0, 8);
+
+        int_handler[INT_HW0] = malta_isa_irq_handler;
+        cp0_unmask_int(INT_HW0);
 
 #if (defined(CONFIG_NS16550) || defined(CONFIG_NS16550_OUT))
@@ -86 +102 @@
         outdev_t **tty_out_ptr = NULL;
 #endif
-        tty_instance = ns16550_init((ioport8_t *) TTY_BASE, 0, TTY_CPU_INT,
-            tty_clear_interrupt, NULL, tty_out_ptr);
+        tty_instance = ns16550_init((ioport8_t *) TTY_BASE, 0, TTY_ISA_IRQ,
+            NULL, NULL, tty_out_ptr);
 #endif
 }
@@ -121 +137 @@
                         ns16550_wire(tty_instance, srln);
                         pic_enable_irqs(1 << TTY_ISA_IRQ);
-                        cp0_unmask_int(TTY_CPU_INT);
                 }
         }

kernel/arch/mips32/src/mach/msim/msim.c

@@ -41 +41 @@
 #include <genarch/drivers/dsrln/dsrlnout.h>
 #include <genarch/srln/srln.h>
+#include <stdbool.h>
 
 static void msim_init(void);
@@ -60 +61 @@
 };
 
+static void msim_irq_handler(unsigned int i)
+{
+        irq_t *irq = irq_dispatch_and_lock(i);
+        if (irq) {
+                irq->handler(irq);
+                irq_spinlock_unlock(&irq->lock, false);
+        } else {
+#ifdef CONFIG_DEBUG
+                log(LF_ARCH, LVL_DEBUG, "cpu%u: spurious IRQ (irq=%u)",
+                    CPU->id, i);
+#endif
+        }
+}
+
 void msim_init(void)
 {
+        irq_init(HW_INTERRUPTS, HW_INTERRUPTS);
+
+        int_handler[INT_HW0] = msim_irq_handler;
+        int_handler[INT_HW1] = msim_irq_handler;
+        int_handler[INT_HW2] = msim_irq_handler;
+        int_handler[INT_HW3] = msim_irq_handler;
+        int_handler[INT_HW4] = msim_irq_handler;
+
         dorder_init();
         cp0_unmask_int(MSIM_DDISK_IRQ);