Changeset 57c2a87 in mainline

Timestamp:

2016-05-05T13:02:20Z (8 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

a0d9abcd

Parents:

811770c

Message:

Avoid even more magic numbers

Location:

kernel/arch

Files:

• amd64/include/arch/cpu.h (modified) (1 diff)
• amd64/src/smp/ap.S (modified) (1 diff)
• ia32/include/arch/cpu.h (modified) (2 diffs)
• ia32/include/arch/cpuid.h (modified) (2 diffs)
• ia32/src/boot/multiboot.S (modified) (5 diffs)
• ia32/src/boot/vesa_real.inc (modified) (2 diffs)
• ia32/src/cpu/cpu.c (modified) (2 diffs)
• ia32/src/smp/ap.S (modified) (2 diffs)

kernel/arch/amd64/include/arch/cpu.h

@@ -50 +50 @@
 #define RFLAGS_ID       (1 << 21)
 
+#define CR0_PE          (1 << 0)
 #define CR0_MP          (1 << 1)
 #define CR0_EM          (1 << 2)

kernel/arch/amd64/src/smp/ap.S

@@ -58 +58 @@
         
         movl %cr0, %eax
-        orl $1, %eax
+        orl $CR0_PE, %eax
         movl %eax, %cr0     # switch to protected mode
         jmpl $GDT_SELECTOR(KTEXT32_DES), $jump_to_kernel - BOOT_OFFSET + AP_BOOT_OFFSET

kernel/arch/ia32/include/arch/cpu.h

@@ -41 +41 @@
 #define EFLAGS_NT       (1 << 14)
 #define EFLAGS_RF       (1 << 16)
+#define EFLAGS_ID       (1 << 21)
 
+#define CR0_PE          (1 << 0) 
+#define CR0_TS          (1 << 3)
 #define CR0_AM          (1 << 18)
 #define CR0_NW          (1 << 29)
@@ -47 +50 @@
 #define CR0_PG          (1 << 31)
 
-#define CR4_OSFXSR_MASK         (1 << 9)
-#define CR4_OSXMMEXCPT_MASK     (1 << 10)
+#define CR4_PSE         (1 << 4)
+#define CR4_PAE         (1 << 5)
+#define CR4_OSFXSR      (1 << 9)
+#define CR4_OSXMMEXCPT  (1 << 10)
 
 #define IA32_APIC_BASE_GE       (1 << 11)

kernel/arch/ia32/include/arch/cpuid.h

@@ -44 +44 @@
 
 #include <typedefs.h>
+#include <arch/cpu.h>
 
 typedef struct {
@@ -84 +85 @@
         
         asm volatile (
-                "pushf\n"                    /* read flags */
+                "pushf\n"                       /* read flags */
                 "popl %[ret]\n"
                 "movl %[ret], %[val]\n"
                 
-                "btcl $21, %[val]\n"         /* swap the ID bit */
+                "xorl %[eflags_id], %[val]\n"   /* swap the ID bit */
                 
-                "pushl %[val]\n"             /* propagate the change into flags */
+                "pushl %[val]\n"                /* propagate the change into flags */
                 "popf\n"
                 "pushf\n"
                 "popl %[val]\n"
                 
-                "andl $(1 << 21), %[ret]\n"  /* interrested only in ID bit */
-                "andl $(1 << 21), %[val]\n"
+                "andl %[eflags_id], %[ret]\n"   /* interrested only in ID bit */
+                "andl %[eflags_id], %[val]\n"
                 "xorl %[val], %[ret]\n"
                 : [ret] "=r" (ret), [val] "=r" (val)
+                : [eflags_id] "i" (EFLAGS_ID)
         );
         

kernel/arch/ia32/src/boot/multiboot.S

@@ -35 +35 @@
 #include <genarch/multiboot/multiboot.h>
 #include <arch/cpuid.h>
+#include <arch/cpu.h>
 
 #define START_STACK  (BOOT_OFFSET - BOOT_STACK_SIZE)
@@ -166 +167 @@
         /* Paging features */
         movl %cr4, %ecx
-        orl $(1 << 4), %ecx      /* PSE on */
-        andl $(~(1 << 5)), %ecx  /* PAE off */
+        orl $CR4_PSE, %ecx      /* PSE on */
+        andl $~CR4_PAE, %ecx    /* PAE off */
         movl %ecx, %cr4
         
@@ -191 +192 @@
         
         movl %cr0, %ebx
-        orl $(1 << 31), %ebx  /* paging on */
+        orl $CR0_PG, %ebx       /* paging on */
         movl %ebx, %cr0
         ret
@@ -205 +206 @@
         /* Paging features */
         movl %cr4, %ecx
-        andl $(~(1 << 5)), %ecx  /* PAE off */
+        andl $~CR4_PAE, %ecx  /* PAE off */
         movl %ecx, %cr4
         
@@ -277 +278 @@
                 
                 movl %cr0, %ebx
-                orl $(1 << 31), %ebx  /* paging on */
+                orl $CR0_PG, %ebx  /* paging on */
                 movl %ebx, %cr0
                 

kernel/arch/ia32/src/boot/vesa_real.inc

@@ -49 +49 @@
 vesa_init_real:
         mov %cr0, %eax
-        and $~1, %eax
+        and $~CR0_PE, %eax
         mov %eax, %cr0
         
@@ -352 +352 @@
                 
                         mov %cr0, %ecx
-                        or $1, %ecx
+                        or $CR0_PE, %ecx
                         mov %ecx, %cr0
                         

kernel/arch/ia32/src/cpu/cpu.c

@@ -72 +72 @@
 void fpu_disable(void)
 {
-        asm volatile (
-                "mov %%cr0, %%eax\n"
-                "or $8, %%eax\n"
-                "mov %%eax, %%cr0\n"
-                ::: "%eax"
-        );
+        write_cr0(read_cr0() & ~CR0_TS); 
 }
 
 void fpu_enable(void)
 {
-        asm volatile (
-                "mov %%cr0, %%eax\n"
-                "and $0xffFFffF7, %%eax\n"
-                "mov %%eax,%%cr0\n"
-                ::: "%eax"
-        );
+        write_cr0(read_cr0() | CR0_TS); 
 }
 
@@ -115 +105 @@
                         "mov %[help], %%cr4\n"
                         : [help] "+r" (help)
-                        : [mask] "i" (CR4_OSFXSR_MASK | CR4_OSXMMEXCPT_MASK)
+                        : [mask] "i" (CR4_OSFXSR | CR4_OSXMMEXCPT)
                 );
         }

kernel/arch/ia32/src/smp/ap.S

@@ -37 +37 @@
 #include <arch/mm/page.h>
 #include <arch/pm.h>
+#include <arch/cpu.h>
 
 .section K_TEXT_START, "ax"
@@ -63 +64 @@
         /* switch to protected mode */
         movl %cr0, %eax
-        orl $1, %eax
+        orl $CR0_PE, %eax
         movl %eax, %cr0
         jmpl $KTEXT, $jump_to_kernel - BOOT_OFFSET + AP_BOOT_OFFSET