Changeset 5cb223f in mainline


Ignore:
Timestamp:
2009-02-19T22:00:44Z (15 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
4544884
Parents:
7d60cf5
Message:

Adapt most of the kernel to ioport8_t, ioport16_t and ioport32_t types.

Location:
kernel
Files:
9 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/ia32/include/drivers/ega.h

    r7d60cf5 r5cb223f  
    3737
    3838#define EGA_VIDEORAM    0xb8000
    39 #define EGA_BASE        0x3d4
     39#define EGA_BASE        ((ioport8_t *)0x3d4)
    4040
    4141#endif
  • kernel/arch/ia32/include/drivers/i8259.h

    r7d60cf5 r5cb223f  
    3939#include <arch/interrupt.h>
    4040
    41 #define PIC_PIC0PORT1   0x20
    42 #define PIC_PIC0PORT2   0x21
    43 #define PIC_PIC1PORT1   0xa0
    44 #define PIC_PIC1PORT2   0xa1
     41#define PIC_PIC0PORT1   ((ioport8_t *) 0x20)
     42#define PIC_PIC0PORT2   ((ioport8_t *) 0x21)
     43#define PIC_PIC1PORT1   ((ioport8_t *) 0xa0)
     44#define PIC_PIC1PORT2   ((ioport8_t *) 0xa1)
    4545
    4646#define PIC_NEEDICW4    (1<<0)
  • kernel/arch/ia32/src/drivers/i8254.c

    r7d60cf5 r5cb223f  
    5454#include <ddi/device.h>
    5555
    56 #define CLK_PORT1       0x40
    57 #define CLK_PORT4       0x43
     56#define CLK_PORT1       ((ioport8_t *)0x40)
     57#define CLK_PORT4       ((ioport8_t *)0x43)
    5858
    5959#define CLK_CONST       1193180
  • kernel/arch/ia32/src/drivers/i8259.c

    r7d60cf5 r5cb223f  
    120120void pic_eoi(void)
    121121{
    122         pio_write_8(0x20, 0x20);
    123         pio_write_8(0xa0, 0x20);
     122        pio_write_8((ioport8_t *)0x20, 0x20);
     123        pio_write_8((ioport8_t *)0xa0, 0x20);
    124124}
    125125
  • kernel/arch/ia32/src/smp/smp.c

    r7d60cf5 r5cb223f  
    123123         * BIOS will not do the POST after the INIT signal.
    124124         */
    125         pio_write_8(0x70, 0xf);
    126         pio_write_8(0x71, 0xa);
     125        pio_write_8((ioport8_t *)0x70, 0xf);
     126        pio_write_8((ioport8_t *)0x71, 0xa);
    127127
    128128        pic_disable_irqs(0xffff);
  • kernel/arch/ia64/include/drivers/ega.h

    r7d60cf5 r5cb223f  
    3737
    3838#define EGA_VIDEORAM    0xb8000
    39 #define EGA_BASE        0x3d4
     39#define EGA_BASE        ((ioport8_t *)0x3d4)
    4040
    4141#endif
  • kernel/genarch/include/drivers/ega/ega.h

    r7d60cf5 r5cb223f  
    4747
    4848extern void ega_redraw(void);
    49 extern void ega_init(ioport_t, uintptr_t);
     49extern void ega_init(ioport8_t *, uintptr_t);
    5050
    5151#endif
  • kernel/genarch/src/drivers/ega/ega.c

    r7d60cf5 r5cb223f  
    5959static uint8_t *videoram;
    6060static uint8_t *backbuf;
    61 static ioport_t ega_base;
     61static ioport8_t *ega_base;
    6262
    6363chardev_t ega_console;
     
    132132};
    133133
    134 void ega_init(ioport_t base, uintptr_t videoram_phys)
     134void ega_init(ioport8_t *base, uintptr_t videoram_phys)
    135135{
    136136        /* Initialize the software structure. */       
  • kernel/generic/src/ipc/irq.c

    r7d60cf5 r5cb223f  
    102102                        break;
    103103                case CMD_PORT_READ_1:
    104                         dstval = pio_read_8((long) code->cmds[i].addr);
     104                        dstval = pio_read_8((ioport8_t *) code->cmds[i].addr);
    105105                        break;
    106106                case CMD_PORT_WRITE_1:
    107                         pio_write_8((long) code->cmds[i].addr, code->cmds[i].value);
     107                        pio_write_8((ioport8_t *) code->cmds[i].addr, code->cmds[i].value);
    108108                        break;
    109109                default:
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