Changeset d1cbad5 in mainline


Ignore:
Timestamp:
2019-03-30T15:24:52Z (5 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
a773b8b
Parents:
87a5796
Message:

Pass device addresses to i8259_init via arguments

Location:
kernel
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/amd64/src/amd64.c

    r87a5796 rd1cbad5  
    120120
    121121                /* PIC */
    122                 i8259_init();
     122                i8259_init((i8259_t *) I8259_PIC0_BASE,
     123                    (i8259_t *) I8259_PIC1_BASE);
    123124        }
    124125}
  • kernel/arch/ia32/src/ia32.c

    r87a5796 rd1cbad5  
    109109
    110110                /* PIC */
    111                 i8259_init();
     111                i8259_init((i8259_t *) I8259_PIC0_BASE,
     112                    (i8259_t *) I8259_PIC1_BASE);
    112113        }
    113114}
  • kernel/genarch/include/genarch/drivers/i8259/i8259.h

    r87a5796 rd1cbad5  
    3939#include <arch/interrupt.h>
    4040
    41 #define PIC_PIC0PORT1  ((ioport8_t *) 0x20U)
    42 #define PIC_PIC0PORT2  ((ioport8_t *) 0x21U)
    43 #define PIC_PIC1PORT1  ((ioport8_t *) 0xa0U)
    44 #define PIC_PIC1PORT2  ((ioport8_t *) 0xa1U)
    45 
    4641/* ICW1 bits */
    4742#define PIC_ICW1           (1 << 4)
     
    5247#define PIC_OCW4_NSEOI     (1 << 5)
    5348
    54 extern void i8259_init(void);
     49typedef struct {
     50        ioport8_t port1;
     51        ioport8_t port2;
     52} __attribute__((packed)) i8259_t;
     53
     54extern void i8259_init(i8259_t *, i8259_t *);
    5555extern void pic_enable_irqs(uint16_t);
    5656extern void pic_disable_irqs(uint16_t);
  • kernel/genarch/include/genarch/drivers/legacy/ia32/io.h

    r87a5796 rd1cbad5  
    4444#define NS16550_BASE  ((ioport8_t *) 0x3f8)
    4545
     46#define I8259_PIC0_BASE ((ioport8_t *) 0x20U)
     47#define I8259_PIC1_BASE ((ioport8_t *) 0xA0U)
     48
    4649#define EGA_VIDEORAM  0xb8000
    4750
  • kernel/genarch/src/drivers/i8259/i8259.c

    r87a5796 rd1cbad5  
    4747static void pic_spurious(unsigned int n, istate_t *istate);
    4848
    49 void i8259_init(void)
     49// XXX: need to change pic_* API to get rid of these
     50static i8259_t *saved_pic0;
     51static i8259_t *saved_pic1;
     52
     53void i8259_init(i8259_t *pic0, i8259_t *pic1)
    5054{
     55        saved_pic0 = pic0;
     56        saved_pic1 = pic1;
     57
    5158        /* ICW1: this is ICW1, ICW4 to follow */
    52         pio_write_8(PIC_PIC0PORT1, PIC_ICW1 | PIC_ICW1_NEEDICW4);
     59        pio_write_8(&pic0->port1, PIC_ICW1 | PIC_ICW1_NEEDICW4);
    5360
    5461        /* ICW2: IRQ 0 maps to INT IRQBASE */
    55         pio_write_8(PIC_PIC0PORT2, IVT_IRQBASE);
     62        pio_write_8(&pic0->port2, IVT_IRQBASE);
    5663
    5764        /* ICW3: pic1 using IRQ IRQ_PIC1 */
    58         pio_write_8(PIC_PIC0PORT2, 1 << IRQ_PIC1);
     65        pio_write_8(&pic0->port2, 1 << IRQ_PIC1);
    5966
    6067        /* ICW4: i8086 mode */
    61         pio_write_8(PIC_PIC0PORT2, 1);
     68        pio_write_8(&pic0->port2, 1);
    6269
    6370        /* ICW1: ICW1, ICW4 to follow */
    64         pio_write_8(PIC_PIC1PORT1, PIC_ICW1 | PIC_ICW1_NEEDICW4);
     71        pio_write_8(&pic1->port1, PIC_ICW1 | PIC_ICW1_NEEDICW4);
    6572
    6673        /* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
    67         pio_write_8(PIC_PIC1PORT2, IVT_IRQBASE + 8);
     74        pio_write_8(&pic1->port2, IVT_IRQBASE + 8);
    6875
    6976        /* ICW3: pic1 is known as IRQ_PIC1 */
    70         pio_write_8(PIC_PIC1PORT2, IRQ_PIC1);
     77        pio_write_8(&pic1->port2, IRQ_PIC1);
    7178
    7279        /* ICW4: i8086 mode */
    73         pio_write_8(PIC_PIC1PORT2, 1);
     80        pio_write_8(&pic1->port2, 1);
    7481
    7582        /*
     
    97104
    98105        if (irqmask & 0xff) {
    99                 x = pio_read_8(PIC_PIC0PORT2);
    100                 pio_write_8(PIC_PIC0PORT2, (uint8_t) (x & (~(irqmask & 0xff))));
     106                x = pio_read_8(&saved_pic0->port2);
     107                pio_write_8(&saved_pic0->port2,
     108                    (uint8_t) (x & (~(irqmask & 0xff))));
    101109        }
    102110        if (irqmask >> 8) {
    103                 x = pio_read_8(PIC_PIC1PORT2);
    104                 pio_write_8(PIC_PIC1PORT2, (uint8_t) (x & (~(irqmask >> 8))));
     111                x = pio_read_8(&saved_pic1->port2);
     112                pio_write_8(&saved_pic1->port2,
     113                    (uint8_t) (x & (~(irqmask >> 8))));
    105114        }
    106115}
     
    111120
    112121        if (irqmask & 0xff) {
    113                 x = pio_read_8(PIC_PIC0PORT2);
    114                 pio_write_8(PIC_PIC0PORT2, (uint8_t) (x | (irqmask & 0xff)));
     122                x = pio_read_8(&saved_pic0->port2);
     123                pio_write_8(&saved_pic0->port2,
     124                    (uint8_t) (x | (irqmask & 0xff)));
    115125        }
    116126        if (irqmask >> 8) {
    117                 x = pio_read_8(PIC_PIC1PORT2);
    118                 pio_write_8(PIC_PIC1PORT2, (uint8_t) (x | (irqmask >> 8)));
     127                x = pio_read_8(&saved_pic1->port2);
     128                pio_write_8(&saved_pic1->port2, (uint8_t) (x | (irqmask >> 8)));
    119129        }
    120130}
     
    122132void pic_eoi(void)
    123133{
    124         pio_write_8(PIC_PIC0PORT1, PIC_OCW4 | PIC_OCW4_NSEOI);
    125         pio_write_8(PIC_PIC1PORT1, PIC_OCW4 | PIC_OCW4_NSEOI);
     134        pio_write_8(&saved_pic0->port1, PIC_OCW4 | PIC_OCW4_NSEOI);
     135        pio_write_8(&saved_pic1->port1, PIC_OCW4 | PIC_OCW4_NSEOI);
    126136}
    127137
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