Changes in / [0bbd13e:e6a78b9] in mainline
- Files:
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- 6 added
- 4 edited
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kernel/arch/amd64/src/mm/page.c
r0bbd13e re6a78b9 57 57 uintptr_t cur; 58 58 unsigned int identity_flags = 59 PAGE_ CACHEABLE | PAGE_EXEC | PAGE_GLOBAL | PAGE_WRITE;59 PAGE_GLOBAL | PAGE_CACHEABLE | PAGE_EXEC | PAGE_WRITE | PAGE_READ; 60 60 61 61 page_mapping_operations = &pt_mapping_operations; -
kernel/arch/ia32/src/mm/page.c
r0bbd13e re6a78b9 71 71 for (cur = 0; cur < min(config.identity_size, config.physmem_end); 72 72 cur += FRAME_SIZE) { 73 flags = PAGE_CACHEABLE | PAGE_WRITE; 74 if ((PA2KA(cur) >= config.base) && 75 (PA2KA(cur) < config.base + config.kernel_size)) 76 flags |= PAGE_GLOBAL; 73 flags = PAGE_GLOBAL | PAGE_CACHEABLE | PAGE_WRITE | PAGE_READ; 77 74 page_mapping_insert(AS_KERNEL, PA2KA(cur), cur, flags); 78 75 } -
kernel/genarch/src/mm/page_pt.c
r0bbd13e re6a78b9 346 346 SET_PTL1_ADDRESS(ptl0, PTL0_INDEX(addr), KA2PA(l1)); 347 347 SET_PTL1_FLAGS(ptl0, PTL0_INDEX(addr), 348 PAGE_PRESENT | PAGE_USER | PAGE_ EXEC | PAGE_CACHEABLE |349 PAGE_ WRITE);348 PAGE_PRESENT | PAGE_USER | PAGE_CACHEABLE | 349 PAGE_EXEC | PAGE_WRITE | PAGE_READ); 350 350 } 351 351 } -
kernel/generic/src/mm/as.c
r0bbd13e re6a78b9 665 665 666 666 page_table_lock(as, false); 667 668 /*669 * Start TLB shootdown sequence.670 */671 ipl_t ipl = tlb_shootdown_start(TLB_INVL_PAGES, as->asid,672 area->base + P2SZ(pages), area->pages - pages);673 667 674 668 /* … … 726 720 } 727 721 722 /* 723 * Start TLB shootdown sequence. 724 * 725 * The sequence is rather short and can be 726 * repeated multiple times. The reason is that 727 * we don't want to have used_space_remove() 728 * inside the sequence as it may use a blocking 729 * memory allocation for its B+tree. Blocking 730 * while holding the tlblock spinlock is 731 * forbidden and would hit a kernel assertion. 732 */ 733 734 ipl_t ipl = tlb_shootdown_start(TLB_INVL_PAGES, 735 as->asid, area->base + P2SZ(pages), 736 area->pages - pages); 737 728 738 for (; i < size; i++) { 729 739 pte_t *pte = page_mapping_find(as, … … 743 753 page_mapping_remove(as, ptr + P2SZ(i)); 744 754 } 755 756 /* 757 * Finish TLB shootdown sequence. 758 */ 759 760 tlb_invalidate_pages(as->asid, 761 area->base + P2SZ(pages), 762 area->pages - pages); 763 764 /* 765 * Invalidate software translation caches 766 * (e.g. TSB on sparc64, PHT on ppc32). 767 */ 768 as_invalidate_translation_cache(as, 769 area->base + P2SZ(pages), 770 area->pages - pages); 771 tlb_shootdown_finalize(ipl); 745 772 } 746 773 } 747 748 /*749 * Finish TLB shootdown sequence.750 */751 752 tlb_invalidate_pages(as->asid, area->base + P2SZ(pages),753 area->pages - pages);754 755 /*756 * Invalidate software translation caches757 * (e.g. TSB on sparc64, PHT on ppc32).758 */759 as_invalidate_translation_cache(as, area->base + P2SZ(pages),760 area->pages - pages);761 tlb_shootdown_finalize(ipl);762 763 774 page_table_unlock(as, false); 764 775 } else {
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