Changeset ee06f2a in mainline


Ignore:
Timestamp:
2009-02-15T15:28:00Z (15 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
2d96f4d
Parents:
e7f2ad68
Message:

Introduce a more platform-neutral name for programmed I/O.

The new API looks like pio_read_n() or pio_write_n(), where n is 8, 16 or 32.
The old API (i.e. inb(), inw(), inl(), outb() outw(), outl()) may have made
some people think that the interface is only to be used with the separate I/O
space. That's not the case. This API is to be implemented on all platforms
so that we can finally have really generic kernel device drivers.

Location:
kernel
Files:
16 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/amd64/include/asm.h

    re7f2ad68 ree06f2a  
    7474 * @return Value read
    7575 */
    76 static inline uint8_t inb(uint16_t port)
     76static inline uint8_t pio_read_8(uint16_t port)
    7777{
    7878        uint8_t val;
    … …  
    8989 * @param val Value to write
    9090 */
    91 static inline void outb(uint16_t port, uint8_t val)
     91static inline void pio_write_8(uint16_t port, uint8_t val)
    9292{
    9393        asm volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port));

  • kernel/arch/arm32/include/asm.h

    re7f2ad68 ree06f2a  
    4747}
    4848
    49 /** No I/O port address space on ARM. */
    50 static inline void outb(ioport_t port, uint8_t v)
     49static inline void pio_write_8(ioport_t port, uint8_t v)
    5150{
     51        /* XXX */
    5252}
    5353
    54 /** No I/O port address space on ARM. */
    55 static inline uint8_t inb(ioport_t port)
     54static inline uint8_t pio_read_8(ioport_t port)
    5655{
    57         return 0;
     56        return 0;       /* XXX */
    5857}
    5958

  • kernel/arch/ia32/include/asm.h

    re7f2ad68 ree06f2a  
    106106 * @param val Value to write
    107107 */
    108 static inline void outb(uint16_t port, uint8_t val)
     108static inline void pio_write_8(uint16_t port, uint8_t val)
    109109{
    110110        asm volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) );
    … …  
    118118 * @param val Value to write
    119119 */
    120 static inline void outw(uint16_t port, uint16_t val)
     120static inline void pio_write_16(uint16_t port, uint16_t val)
    121121{
    122122        asm volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) );
    … …  
    130130 * @param val Value to write
    131131 */
    132 static inline void outl(uint16_t port, uint32_t val)
     132static inline void pio_write_32(uint16_t port, uint32_t val)
    133133{
    134134        asm volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) );
    … …  
    142142 * @return Value read
    143143 */
    144 static inline uint8_t inb(uint16_t port)
     144static inline uint8_t pio_read_8(uint16_t port)
    145145{
    146146        uint8_t val;
    … …  
    157157 * @return Value read
    158158 */
    159 static inline uint16_t inw(uint16_t port)
     159static inline uint16_t pio_read_16(uint16_t port)
    160160{
    161161        uint16_t val;
    … …  
    172172 * @return Value read
    173173 */
    174 static inline uint32_t inl(uint16_t port)
     174static inline uint32_t pio_read_32(uint16_t port)
    175175{
    176176        uint32_t val;

  • kernel/arch/ia32/include/drivers/i8042.h

    re7f2ad68 ree06f2a  
    4848static inline void i8042_data_write(uint8_t data)
    4949{
    50         outb(i8042_DATA, data);
     50        pio_write_8(i8042_DATA, data);
    5151}
    5252
    5353static inline uint8_t i8042_data_read(void)
    5454{
    55         return inb(i8042_DATA);
     55        return pio_read_8(i8042_DATA);
    5656}
    5757
    5858static inline uint8_t i8042_status_read(void)
    5959{
    60         return inb(i8042_STATUS);
     60        return pio_read_8(i8042_STATUS);
    6161}
    6262
    6363static inline void i8042_command_write(uint8_t command)
    6464{
    65         outb(i8042_STATUS, command);
     65        pio_write_8(i8042_STATUS, command);
    6666}
    6767

  • kernel/arch/ia32/src/drivers/i8254.c

    re7f2ad68 ree06f2a  
    9595void i8254_normal_operation(void)
    9696{
    97         outb(CLK_PORT4, 0x36);
     97        pio_write_8(CLK_PORT4, 0x36);
    9898        pic_disable_irqs(1 << IRQ_CLK);
    99         outb(CLK_PORT1, (CLK_CONST / HZ) & 0xf);
    100         outb(CLK_PORT1, (CLK_CONST / HZ) >> 8);
     99        pio_write_8(CLK_PORT1, (CLK_CONST / HZ) & 0xf);
     100        pio_write_8(CLK_PORT1, (CLK_CONST / HZ) >> 8);
    101101        pic_enable_irqs(1 << IRQ_CLK);
    102102}
    … …  
    115115         * MAGIC_NUMBER is the magic value for 1ms.
    116116         */
    117         outb(CLK_PORT4, 0x30);
    118         outb(CLK_PORT1, 0xff);
    119         outb(CLK_PORT1, 0xff);
     117        pio_write_8(CLK_PORT4, 0x30);
     118        pio_write_8(CLK_PORT1, 0xff);
     119        pio_write_8(CLK_PORT1, 0xff);
    120120
    121121        do {
    122122                /* will read both status and count */
    123                 outb(CLK_PORT4, 0xc2);
    124                 not_ok = (uint8_t) ((inb(CLK_PORT1) >> 6) & 1);
    125                 t1 = inb(CLK_PORT1);
    126                 t1 |= inb(CLK_PORT1) << 8;
     123                pio_write_8(CLK_PORT4, 0xc2);
     124                not_ok = (uint8_t) ((pio_read_8(CLK_PORT1) >> 6) & 1);
     125                t1 = pio_read_8(CLK_PORT1);
     126                t1 |= pio_read_8(CLK_PORT1) << 8;
    127127        } while (not_ok);
    128128
    129129        asm_delay_loop(LOOPS);
    130130
    131         outb(CLK_PORT4, 0xd2);
    132         t2 = inb(CLK_PORT1);
    133         t2 |= inb(CLK_PORT1) << 8;
     131        pio_write_8(CLK_PORT4, 0xd2);
     132        t2 = pio_read_8(CLK_PORT1);
     133        t2 |= pio_read_8(CLK_PORT1) << 8;
    134134
    135135        /*
    136136         * We want to determine the overhead of the calibrating mechanism.
    137137         */
    138         outb(CLK_PORT4, 0xd2);
    139         o1 = inb(CLK_PORT1);
    140         o1 |= inb(CLK_PORT1) << 8;
     138        pio_write_8(CLK_PORT4, 0xd2);
     139        o1 = pio_read_8(CLK_PORT1);
     140        o1 |= pio_read_8(CLK_PORT1) << 8;
    141141
    142142        asm_fake_loop(LOOPS);
    143143
    144         outb(CLK_PORT4, 0xd2);
    145         o2 = inb(CLK_PORT1);
    146         o2 |= inb(CLK_PORT1) << 8;
     144        pio_write_8(CLK_PORT4, 0xd2);
     145        o2 = pio_read_8(CLK_PORT1);
     146        o2 |= pio_read_8(CLK_PORT1) << 8;
    147147
    148148        CPU->delay_loop_const =

  • kernel/arch/ia32/src/drivers/i8259.c

    re7f2ad68 ree06f2a  
    5050{
    5151        /* ICW1: this is ICW1, ICW4 to follow */
    52         outb(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4);
     52        pio_write_8(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4);
    5353
    5454        /* ICW2: IRQ 0 maps to INT IRQBASE */
    55         outb(PIC_PIC0PORT2, IVT_IRQBASE);
     55        pio_write_8(PIC_PIC0PORT2, IVT_IRQBASE);
    5656
    5757        /* ICW3: pic1 using IRQ IRQ_PIC1 */
    58         outb(PIC_PIC0PORT2, 1 << IRQ_PIC1);
     58        pio_write_8(PIC_PIC0PORT2, 1 << IRQ_PIC1);
    5959
    6060        /* ICW4: i8086 mode */
    61         outb(PIC_PIC0PORT2, 1);
     61        pio_write_8(PIC_PIC0PORT2, 1);
    6262
    6363        /* ICW1: ICW1, ICW4 to follow */
    64         outb(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4);
     64        pio_write_8(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4);
    6565
    6666        /* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
    67         outb(PIC_PIC1PORT2, IVT_IRQBASE + 8);
     67        pio_write_8(PIC_PIC1PORT2, IVT_IRQBASE + 8);
    6868
    6969        /* ICW3: pic1 is known as IRQ_PIC1 */
    70         outb(PIC_PIC1PORT2, IRQ_PIC1);
     70        pio_write_8(PIC_PIC1PORT2, IRQ_PIC1);
    7171
    7272        /* ICW4: i8086 mode */
    73         outb(PIC_PIC1PORT2, 1);
     73        pio_write_8(PIC_PIC1PORT2, 1);
    7474
    7575        /*
    … …  
    9595
    9696        if (irqmask & 0xff) {
    97                 x = inb(PIC_PIC0PORT2);
    98                 outb(PIC_PIC0PORT2, (uint8_t) (x & (~(irqmask & 0xff))));
     97                x = pio_read_8(PIC_PIC0PORT2);
     98                pio_write_8(PIC_PIC0PORT2, (uint8_t) (x & (~(irqmask & 0xff))));
    9999        }
    100100        if (irqmask >> 8) {
    101                 x = inb(PIC_PIC1PORT2);
    102                 outb(PIC_PIC1PORT2, (uint8_t) (x & (~(irqmask >> 8))));
     101                x = pio_read_8(PIC_PIC1PORT2);
     102                pio_write_8(PIC_PIC1PORT2, (uint8_t) (x & (~(irqmask >> 8))));
    103103        }
    104104}
    … …  
    109109
    110110        if (irqmask & 0xff) {
    111                 x = inb(PIC_PIC0PORT2);
    112                 outb(PIC_PIC0PORT2, (uint8_t) (x | (irqmask & 0xff)));
     111                x = pio_read_8(PIC_PIC0PORT2);
     112                pio_write_8(PIC_PIC0PORT2, (uint8_t) (x | (irqmask & 0xff)));
    113113        }
    114114        if (irqmask >> 8) {
    115                 x = inb(PIC_PIC1PORT2);
    116                 outb(PIC_PIC1PORT2, (uint8_t) (x | (irqmask >> 8)));
     115                x = pio_read_8(PIC_PIC1PORT2);
     116                pio_write_8(PIC_PIC1PORT2, (uint8_t) (x | (irqmask >> 8)));
    117117        }
    118118}
    … …  
    120120void pic_eoi(void)
    121121{
    122         outb(0x20, 0x20);
    123         outb(0xa0, 0x20);
     122        pio_write_8(0x20, 0x20);
     123        pio_write_8(0xa0, 0x20);
    124124}
    125125

  • kernel/arch/ia32/src/smp/smp.c

    re7f2ad68 ree06f2a  
    123123         * BIOS will not do the POST after the INIT signal.
    124124         */
    125         outb(0x70, 0xf);
    126         outb(0x71, 0xa);
     125        pio_write_8(0x70, 0xf);
     126        pio_write_8(0x71, 0xa);
    127127
    128128        pic_disable_irqs(0xffff);

  • kernel/arch/ia64/include/asm.h

    re7f2ad68 ree06f2a  
    4242#define IA64_IOSPACE_ADDRESS 0xE001000000000000ULL
    4343
    44 static inline void outb(ioport_t port, uint8_t v)
     44static inline void pio_write_8(ioport_t port, uint8_t v)
    4545{
    4646        *((uint8_t *)(IA64_IOSPACE_ADDRESS +
    … …  
    5050}
    5151
    52 static inline void outw(ioport_t port, uint16_t v)
     52static inline void pio_write_16(ioport_t port, uint16_t v)
    5353{
    5454        *((uint16_t *)(IA64_IOSPACE_ADDRESS +
    … …  
    5858}
    5959
    60 static inline void outl(ioport_t port, uint32_t v)
     60static inline void pio_write_32(ioport_t port, uint32_t v)
    6161{
    6262        *((uint32_t *)(IA64_IOSPACE_ADDRESS +
    … …  
    6666}
    6767
    68 static inline uint8_t inb(ioport_t port)
     68static inline uint8_t pio_read_8(ioport_t port)
    6969{
    7070        asm volatile ("mf\n" ::: "memory");
    … …  
    7474}
    7575
    76 static inline uint16_t inw(ioport_t port)
     76static inline uint16_t pio_read_16(ioport_t port)
    7777{
    7878        asm volatile ("mf\n" ::: "memory");
    … …  
    8282}
    8383
    84 static inline uint32_t inl(ioport_t port)
     84static inline uint32_t pio_read_32(ioport_t port)
    8585{
    8686        asm volatile ("mf\n" ::: "memory");

  • kernel/arch/ia64/include/drivers/i8042.h

    re7f2ad68 ree06f2a  
    4848static inline void i8042_data_write(uint8_t data)
    4949{
    50         outb(i8042_DATA, data);
     50        pio_write_8(i8042_DATA, data);
    5151}
    5252
    5353static inline uint8_t i8042_data_read(void)
    5454{
    55         return inb(i8042_DATA);
     55        return pio_read_8(i8042_DATA);
    5656}
    5757
    5858static inline uint8_t i8042_status_read(void)
    5959{
    60         return inb(i8042_STATUS);
     60        return pio_read_8(i8042_STATUS);
    6161}
    6262
    6363static inline void i8042_command_write(uint8_t command)
    6464{
    65         outb(i8042_STATUS, command);
     65        pio_write_8(i8042_STATUS, command);
    6666}
    6767

  • kernel/arch/ia64/src/ia64.c

    re7f2ad68 ree06f2a  
    250250void arch_reboot(void)
    251251{
    252         outb(0x64, 0xfe);
     252        pio_write_8(0x64, 0xfe);
    253253        while (1)
    254254                ;

  • kernel/arch/mips32/include/asm.h

    re7f2ad68 ree06f2a  
    7171extern ipl_t interrupts_read(void);
    7272
    73 /** No I/O port address space on MIPS. */
    74 static inline void outb(ioport_t port, uint8_t v)
     73static inline void pio_write_8(ioport_t port, uint8_t v)
    7574{
     75        /* XXX */
    7676}
    7777
    78 /** No I/O port address space on MIPS. */
    79 static inline uint8_t inb(ioport_t port)
     78static inline uint8_t pio_read_8(ioport_t port)
    8079{
    81         return 0;
     80        return 0;       /* XXX */
    8281}
    8382

  • kernel/arch/ppc32/include/asm.h

    re7f2ad68 ree06f2a  
    150150extern void userspace_asm(uintptr_t uspace_uarg, uintptr_t stack, uintptr_t entry);
    151151
    152 /** No I/O port address space on PowerPC. */
    153 static inline void outb(ioport_t port, uint8_t v)
     152static inline void pio_write_8(ioport_t port, uint8_t v)
    154153{
     154        /* XXX */
    155155}
    156156
    157 /** No I/O port address space on PowerPC. */
    158 static inline uint8_t inb(ioport_t port)
     157static inline uint8_t pio_read_8(ioport_t port)
    159158{
    160         return 0;
     159        return 0;       /* XXX */
    161160}
    162161

  • kernel/arch/sparc64/include/asm.h

    re7f2ad68 ree06f2a  
    4545#include <arch/barrier.h>
    4646
    47 static inline void outb(ioport_t port, uint8_t v)
     47static inline void pio_write_8(ioport_t port, uint8_t v)
    4848{
    4949        *((volatile uint8_t *)(port)) = v;
    … …  
    5151}
    5252
    53 static inline void outw(ioport_t port, uint16_t v)
     53static inline void pio_write_16(ioport_t port, uint16_t v)
    5454{
    5555        *((volatile uint16_t *)(port)) = v;
    … …  
    5757}
    5858
    59 static inline void outl(ioport_t port, uint32_t v)
     59static inline void pio_write_32(ioport_t port, uint32_t v)
    6060{
    6161        *((volatile uint32_t *)(port)) = v;
    … …  
    6363}
    6464
    65 static inline uint8_t inb(ioport_t port)
     65static inline uint8_t pio_read_8(ioport_t port)
    6666{
    6767        uint8_t rv;
    … …  
    7373}
    7474
    75 static inline uint16_t inw(ioport_t port)
     75static inline uint16_t pio_read_16(ioport_t port)
    7676{
    7777        uint16_t rv;
    … …  
    8383}
    8484
    85 static inline uint32_t inl(ioport_t port)
     85static inline uint32_t pio_read_32(ioport_t port)
    8686{
    8787        uint32_t rv;

  • kernel/genarch/include/kbd/ns16550.h

    re7f2ad68 ree06f2a  
    7878static inline uint8_t ns16550_rbr_read(ns16550_t *dev)
    7979{
    80         return inb(dev->io_port + RBR_REG);
     80        return pio_read_8(dev->io_port + RBR_REG);
    8181}
    8282static inline void ns16550_rbr_write(ns16550_t *dev, uint8_t v)
    8383{
    84         outb(dev->io_port + RBR_REG, v);
     84        pio_write_8(dev->io_port + RBR_REG, v);
    8585}
    8686
    8787static inline uint8_t ns16550_ier_read(ns16550_t *dev)
    8888{
    89         return inb(dev->io_port + IER_REG);
     89        return pio_read_8(dev->io_port + IER_REG);
    9090}
    9191
    9292static inline void ns16550_ier_write(ns16550_t *dev, uint8_t v)
    9393{
    94         outb(dev->io_port + IER_REG, v);
     94        pio_write_8(dev->io_port + IER_REG, v);
    9595}
    9696
    9797static inline uint8_t ns16550_iir_read(ns16550_t *dev)
    9898{
    99         return inb(dev->io_port + IIR_REG);
     99        return pio_read_8(dev->io_port + IIR_REG);
    100100}
    101101
    102102static inline void ns16550_fcr_write(ns16550_t *dev, uint8_t v)
    103103{
    104         outb(dev->io_port + FCR_REG, v);
     104        pio_write_8(dev->io_port + FCR_REG, v);
    105105}
    106106
    107107static inline uint8_t ns16550_lcr_read(ns16550_t *dev)
    108108{
    109         return inb(dev->io_port + LCR_REG);
     109        return pio_read_8(dev->io_port + LCR_REG);
    110110}
    111111
    112112static inline void ns16550_lcr_write(ns16550_t *dev, uint8_t v)
    113113{
    114         outb(dev->io_port + LCR_REG, v);
     114        pio_write_8(dev->io_port + LCR_REG, v);
    115115}
    116116
    117117static inline uint8_t ns16550_lsr_read(ns16550_t *dev)
    118118{
    119         return inb(dev->io_port + LSR_REG);
     119        return pio_read_8(dev->io_port + LSR_REG);
    120120}
    121121
    122122static inline uint8_t ns16550_mcr_read(ns16550_t *dev)
    123123{
    124         return inb(dev->io_port + MCR_REG);
     124        return pio_read_8(dev->io_port + MCR_REG);
    125125}
    126126
    127127static inline void ns16550_mcr_write(ns16550_t *dev, uint8_t v)
    128128{
    129         outb(dev->io_port + MCR_REG, v);
     129        pio_write_8(dev->io_port + MCR_REG, v);
    130130}
    131131

  • kernel/genarch/src/drivers/ega/ega.c

    re7f2ad68 ree06f2a  
    8484static void ega_move_cursor(void)
    8585{
    86         outb(ega_base + EGA_INDEX_REG, 0xe);
    87         outb(ega_base + EGA_DATA_REG, (uint8_t) ((ega_cursor >> 8) & 0xff));
    88         outb(ega_base + EGA_INDEX_REG, 0xf);
    89         outb(ega_base + EGA_DATA_REG, (uint8_t) (ega_cursor & 0xff));   
     86        pio_write_8(ega_base + EGA_INDEX_REG, 0xe);
     87        pio_write_8(ega_base + EGA_DATA_REG, (uint8_t) ((ega_cursor >> 8) & 0xff));
     88        pio_write_8(ega_base + EGA_INDEX_REG, 0xf);
     89        pio_write_8(ega_base + EGA_DATA_REG, (uint8_t) (ega_cursor & 0xff));   
    9090}
    9191

  • kernel/generic/src/ipc/irq.c

    re7f2ad68 ree06f2a  
    102102                        break;
    103103                case CMD_PORT_READ_1:
    104                         dstval = inb((long) code->cmds[i].addr);
     104                        dstval = pio_read_8((long) code->cmds[i].addr);
    105105                        break;
    106106                case CMD_PORT_WRITE_1:
    107                         outb((long) code->cmds[i].addr, code->cmds[i].value);
     107                        pio_write_8((long) code->cmds[i].addr, code->cmds[i].value);
    108108                        break;
    109109                default:
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