Changeset f5ffc9a in mainline


Ignore:
Timestamp:
2012-10-15T20:41:27Z (12 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
57912af3
Parents:
71d09d6e
Message:

amdm37x, clock control cm: Fix register offset and value.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/infrastructure/rootamdm37x/clock_control_cm.h

    r71d09d6e rf5ffc9a  
    7373#define CLOCK_CONTROL_CM_CLKEN_PLL_EN_PERIPH2_DPLL_LOCK   (0x7)
    7474
    75         PADD32[2];
     75        PADD32[6];
    7676
    7777        const ioport32_t idlest_ckgen;
     
    102102#define CLOCK_CONTROL_CM_AUTOIDLE_PLL_AUTO_CORE_DPLL_MASK   (0x7)
    103103#define CLOCK_CONTROL_CM_AUTOIDLE_PLL_AUTO_CORE_DPLL_DISABLED   (0x0)
    104 #define CLOCK_CONTROL_CM_AUTOIDLE_PLL_AUTO_CORE_DPLL_AUTOMATIC   (0x5)
     104#define CLOCK_CONTROL_CM_AUTOIDLE_PLL_AUTO_CORE_DPLL_AUTOMATIC   (0x1)
     105#define CLOCK_CONTROL_CM_AUTOIDLE_PLL_AUTO_CORE_DPLL_AUTOMATIC_BYPASS   (0x5)
    105106
    106107        ioport32_t autoidle2_pll;
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