Ticket #16 (new enhancement)
mips32 and arm32 loaders need to maintain cache coherence
| Reported by: | jermar | Owned by: | |
|---|---|---|---|
| Priority: | major | Milestone: | |
| Component: | helenos/boot/mips32 | Version: | mainline |
| Keywords: | Cc: | ||
| Blocker for: | Depends on: | ||
| See also: |
Description
Both mips32 and arm32 loaders need to establish cache coherence after they copy the kernel and other components around memory (corner case of self modifying code).
sparc64 already does the right thing.
ppc32 seems to flush something, but the issue still needs to be investigated/confirmed.
ia64, as of now, does not relocate neither the kernel nor the components so the caches are coherent.
Change History
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