Ignore:
Timestamp:
2018-03-26T12:35:30Z (6 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
48974d6
Parents:
064e0fd
git-author:
Jiri Svoboda <jiri@…> (2018-03-25 18:34:49)
git-committer:
Jiri Svoboda <jiri@…> (2018-03-26 12:35:30)
Message:

Move assembler code out of .h files.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/sparc64/include/arch/trap/sun4v/mmu.h

    r064e0fd r5a01f7d  
    6262
    6363#ifdef __ASSEMBLER__
    64 
    65 /* MMU fault status area data fault offset */
    66 #define FSA_DFA_OFFSET                          0x48
    67 
    68 /* MMU fault status area data context */
    69 #define FSA_DFC_OFFSET                          0x50
    70 
    71 /* offset of the target address within the TTE Data entry */
    72 #define TTE_DATA_TADDR_OFFSET                   13
    73 
    74 .macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
    75         mov TT_FAST_INSTRUCTION_ACCESS_MMU_MISS, %g2
    76         clr %g5         ! XXX
    77         PREEMPTIBLE_HANDLER exc_dispatch
    78 .endm
    79 
    80 /*
    81  * Handler of the Fast Data Access MMU Miss trap. If the trap occurred in the kernel
    82  * (context 0), an identity mapping (with displacement) is installed. Otherwise
    83  * a higher level service routine is called.
    84  */
    85 .macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl
    86         mov SCRATCHPAD_MMU_FSA, %g1
    87         ldxa [%g1] ASI_SCRATCHPAD, %g1                  ! g1 <= RA of MMU fault status area
    88 
    89         /* read faulting context */
    90         add %g1, FSA_DFC_OFFSET, %g2                    ! g2 <= RA of data fault context
    91         ldxa [%g2] ASI_REAL, %g3                        ! read the fault context
    92 
    93         /* read the faulting address */
    94         add %g1, FSA_DFA_OFFSET, %g2                    ! g2 <= RA of data fault address
    95         ldxa [%g2] ASI_REAL, %g1                        ! read the fault address
    96         srlx %g1, TTE_DATA_TADDR_OFFSET, %g1            ! truncate it to page boundary
    97         sllx %g1, TTE_DATA_TADDR_OFFSET, %g1
    98 
    99         /* service by higher-level routine when context != 0 */
    100         brnz %g3, 0f
    101         nop
    102         /* exclude page number 0 from installing the identity mapping */
    103         brz %g1, 0f
    104         nop
    105 
    106         /* exclude pages beyond the end of memory from the identity mapping */
    107         sethi %hi(end_of_identity), %g4
    108         ldx [%g4 + %lo(end_of_identity)], %g4
    109         cmp %g1, %g4
    110         bgeu %xcc, 0f
    111         nop
    112 
    113         /*
    114          * Installing the identity does not fit into 32 instructions, call
    115          * a separate routine. The routine performs RETRY, hence the call never
    116          * returns.
    117          */
    118         ba,a %xcc, install_identity_mapping
    119 
    120 0:
    121 
    122         /*
    123          * One of the scenarios in which this trap can occur is when the
    124          * register window spill/fill handler accesses a memory which is not
    125          * mapped. In such a case, this handler will be called from TL = 1.
    126          * We handle the situation by pretending that the MMU miss occurred
    127          * on TL = 0. Once the MMU miss trap is serviced, the instruction which
    128          * caused the spill/fill trap is restarted, the spill/fill trap occurs,
    129          * but this time its handler accesses memory which is mapped.
    130          */
    131         .if (\tl > 0)
    132                 wrpr %g0, 1, %tl
    133         .endif
    134 
    135         mov TT_FAST_DATA_ACCESS_MMU_MISS, %g2
    136 
    137         /*
    138          * Save the faulting virtual page and faulting context to the %g5
    139          * register. The most significant 51 bits of the %g5 register will
    140          * contain the virtual address which caused the fault truncated to the
    141          * page boundary. The least significant 13 bits of the %g5 register
    142          * will contain the number of the context in which the fault occurred.
    143          * The value of the %g5 register will be stored in the istate structure
    144          * for inspeciton by the higher level service routine.
    145          */
    146         or %g1, %g3, %g5
    147 
    148         PREEMPTIBLE_HANDLER exc_dispatch
    149 .endm
    150 
    151 /*
    152  * Handler of the Fast Data MMU Protection trap. Finds the trapping address
    153  * and context and calls higher level service routine.
    154  */
    155 .macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl
    156         /*
    157          * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER.
    158          */
    159         .if (\tl > 0)
    160                 wrpr %g0, 1, %tl
    161         .endif
    162 
    163         mov SCRATCHPAD_MMU_FSA, %g1
    164         ldxa [%g1] ASI_SCRATCHPAD, %g1                  ! g1 <= RA of MMU fault status area
    165 
    166         /* read faulting context */
    167         add %g1, FSA_DFC_OFFSET, %g2                    ! g2 <= RA of data fault context
    168         ldxa [%g2] ASI_REAL, %g3                        ! read the fault context
    169 
    170         /* read the faulting address */
    171         add %g1, FSA_DFA_OFFSET, %g2                    ! g2 <= RA of data fault address
    172         ldxa [%g2] ASI_REAL, %g1                        ! read the fault address
    173         srlx %g1, TTE_DATA_TADDR_OFFSET, %g1            ! truncate it to page boundary
    174         sllx %g1, TTE_DATA_TADDR_OFFSET, %g1
    175 
    176         mov TT_FAST_DATA_ACCESS_PROTECTION, %g2
    177 
    178         /* the same as for FAST_DATA_ACCESS_MMU_MISS_HANDLER */
    179         or %g1, %g3, %g5
    180 
    181         PREEMPTIBLE_HANDLER exc_dispatch
    182 .endm
     64#include <arch/trap/sun4v/mmu.S>
    18365#endif /* __ASSEMBLER__ */
    18466
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