Changeset b80c1ab in mainline for uspace/drv/bus/usb/xhci/hc.c
- Timestamp:
- 2017-11-14T23:17:54Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- e76c0ea
- Parents:
- cfe4852
- git-author:
- Aearsis <Hlavaty.Ondrej@…> (2017-11-14 23:15:24)
- git-committer:
- Aearsis <Hlavaty.Ondrej@…> (2017-11-14 23:17:54)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/usb/xhci/hc.c
rcfe4852 rb80c1ab 38 38 #include <usb/debug.h> 39 39 #include <usb/host/endpoint.h> 40 #include <usb/host/utils/malloc32.h>41 40 #include "debug.h" 42 41 #include "hc.h" … … 201 200 int err; 202 201 203 hc->dcbaa = malloc32((1 + hc->max_slots) * sizeof(uint64_t)); 204 if (!hc->dcbaa) 202 if (dma_buffer_alloc(&hc->dcbaa_dma, (1 + hc->max_slots) * sizeof(uint64_t))) 205 203 return ENOMEM; 204 hc->dcbaa = hc->dcbaa_dma.virt; 206 205 207 206 if ((err = xhci_trb_ring_init(&hc->command_ring))) … … 237 236 xhci_trb_ring_fini(&hc->command_ring); 238 237 err_dcbaa: 239 free32(hc->dcbaa); 238 hc->dcbaa = NULL; 239 dma_buffer_free(&hc->dcbaa_dma); 240 240 return err; 241 241 } … … 402 402 async_usleep(1000); 403 403 404 uint64_t dcbaaptr = addr_to_phys(hc->dcbaa);404 uint64_t dcbaaptr = hc->dcbaa_dma.phys; 405 405 XHCI_REG_WR(hc->op_regs, XHCI_OP_DCBAAP_LO, LOWER32(dcbaaptr)); 406 406 XHCI_REG_WR(hc->op_regs, XHCI_OP_DCBAAP_HI, UPPER32(dcbaaptr)); … … 411 411 XHCI_REG_WR(hc->op_regs, XHCI_OP_CRCR_HI, UPPER32(crptr)); 412 412 413 uint64_t erstptr = addr_to_phys(hc->event_ring.erst);414 uint64_t erdp = hc->event_ring.dequeue_ptr;415 413 xhci_interrupter_regs_t *intr0 = &hc->rt_regs->ir[0]; 416 414 XHCI_REG_WR(intr0, XHCI_INTR_ERSTSZ, hc->event_ring.segment_count); 415 uint64_t erdp = hc->event_ring.dequeue_ptr; 417 416 XHCI_REG_WR(intr0, XHCI_INTR_ERDP_LO, LOWER32(erdp)); 418 417 XHCI_REG_WR(intr0, XHCI_INTR_ERDP_HI, UPPER32(erdp)); 418 uint64_t erstptr = hc->event_ring.erst.phys; 419 419 XHCI_REG_WR(intr0, XHCI_INTR_ERSTBA_LO, LOWER32(erstptr)); 420 420 XHCI_REG_WR(intr0, XHCI_INTR_ERSTBA_HI, UPPER32(erstptr)); … … 572 572 { 573 573 xhci_scratchpad_free(hc); 574 free32(hc->dcbaa);574 dma_buffer_free(&hc->dcbaa_dma); 575 575 } 576 576 … … 628 628 /* Free the device context. */ 629 629 hc->dcbaa[dev->slot_id] = 0; 630 if (dev->dev_ctx) { 631 free32(dev->dev_ctx); 632 dev->dev_ctx = NULL; 633 } 630 dma_buffer_free(&dev->dev_ctx); 634 631 635 632 /* Mark the slot as invalid. */ … … 639 636 } 640 637 641 static int create_valid_input_ctx( xhci_input_ctx_t **out_ictx)642 { 643 xhci_input_ctx_t *ictx = malloc32(sizeof(xhci_input_ctx_t));644 if ( !ictx) {645 return ENOMEM;646 } 647 638 static int create_valid_input_ctx(dma_buffer_t *dma_buf) 639 { 640 const int err = dma_buffer_alloc(dma_buf, sizeof(xhci_input_ctx_t)); 641 if (err) 642 return err; 643 644 xhci_input_ctx_t *ictx = dma_buf->virt; 648 645 memset(ictx, 0, sizeof(xhci_input_ctx_t)); 649 646 … … 654 651 XHCI_INPUT_CTRL_CTX_ADD_SET(ictx->ctrl_ctx, 0); 655 652 656 if (out_ictx) {657 *out_ictx = ictx;658 }659 660 653 return EOK; 661 654 } … … 675 668 676 669 /* Setup and register device context */ 677 dev->dev_ctx = malloc32(sizeof(xhci_device_ctx_t)); 678 if (!dev->dev_ctx) 670 if (dma_buffer_alloc(&dev->dev_ctx, sizeof(xhci_device_ctx_t))) 679 671 goto err; 680 memset(dev->dev_ctx , 0, sizeof(xhci_device_ctx_t));681 682 hc->dcbaa[dev->slot_id] = addr_to_phys(dev->dev_ctx);672 memset(dev->dev_ctx.virt, 0, sizeof(xhci_device_ctx_t)); 673 674 hc->dcbaa[dev->slot_id] = host2xhci(64, dev->dev_ctx.phys); 683 675 684 676 /* Issue configure endpoint command (sec 4.3.5). */ 685 xhci_input_ctx_t *ictx;686 if ((err = create_valid_input_ctx(&ictx ))) {677 dma_buffer_t ictx_dma_buf; 678 if ((err = create_valid_input_ctx(&ictx_dma_buf))) { 687 679 goto err_dev_ctx; 688 680 } 681 xhci_input_ctx_t *ictx = ictx_dma_buf.virt; 689 682 690 683 /* Initialize slot_ctx according to section 4.3.3 point 3. */ … … 705 698 706 699 /* Issue Address Device command. */ 707 if ((err = xhci_cmd_sync_inline(hc, ADDRESS_DEVICE, .slot_id = dev->slot_id, .input_ctx = ictx ))) {700 if ((err = xhci_cmd_sync_inline(hc, ADDRESS_DEVICE, .slot_id = dev->slot_id, .input_ctx = ictx_dma_buf))) { 708 701 goto err_dev_ctx; 709 702 } 710 703 711 dev->base.address = XHCI_SLOT_DEVICE_ADDRESS(dev->dev_ctx->slot_ctx); 704 xhci_device_ctx_t *dev_ctx = dev->dev_ctx.virt; 705 dev->base.address = XHCI_SLOT_DEVICE_ADDRESS(dev_ctx->slot_ctx); 712 706 usb_log_debug2("Obtained USB address: %d.\n", dev->base.address); 713 707 … … 720 714 721 715 err_dev_ctx: 722 free32(dev->dev_ctx);723 716 hc->dcbaa[dev->slot_id] = 0; 717 dma_buffer_free(&dev->dev_ctx); 724 718 err: 725 719 return err; … … 729 723 { 730 724 /* Issue configure endpoint command (sec 4.3.5). */ 731 xhci_input_ctx_t *ictx;732 const int err = create_valid_input_ctx(&ictx );725 dma_buffer_t ictx_dma_buf; 726 const int err = create_valid_input_ctx(&ictx_dma_buf); 733 727 if (err) 734 728 return err; … … 736 730 // TODO: Set slot context and other flags. (probably forgot a lot of 'em) 737 731 738 return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT, .slot_id = slot_id, .input_ctx = ictx );732 return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT, .slot_id = slot_id, .input_ctx = ictx_dma_buf); 739 733 } 740 734 … … 748 742 { 749 743 /* Issue configure endpoint command (sec 4.3.5). */ 750 xhci_input_ctx_t *ictx;751 const int err = create_valid_input_ctx(&ictx );744 dma_buffer_t ictx_dma_buf; 745 const int err = create_valid_input_ctx(&ictx_dma_buf); 752 746 if (err) 753 747 return err; 754 748 749 xhci_input_ctx_t *ictx = ictx_dma_buf.virt; 755 750 XHCI_INPUT_CTRL_CTX_ADD_SET(ictx->ctrl_ctx, ep_idx + 1); /* Preceded by slot ctx */ 756 751 memcpy(&ictx->endpoint_ctx[ep_idx], ep_ctx, sizeof(xhci_ep_ctx_t)); 757 752 // TODO: Set slot context and other flags. (probably forgot a lot of 'em) 758 753 759 return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT, .slot_id = slot_id, .input_ctx = ictx );754 return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT, .slot_id = slot_id, .input_ctx = ictx_dma_buf); 760 755 } 761 756 … … 763 758 { 764 759 /* Issue configure endpoint command (sec 4.3.5). */ 765 xhci_input_ctx_t *ictx;766 const int err = create_valid_input_ctx(&ictx );760 dma_buffer_t ictx_dma_buf; 761 const int err = create_valid_input_ctx(&ictx_dma_buf); 767 762 if (err) 768 763 return err; 769 764 765 xhci_input_ctx_t *ictx = ictx_dma_buf.virt; 770 766 XHCI_INPUT_CTRL_CTX_DROP_SET(ictx->ctrl_ctx, ep_idx + 1); /* Preceded by slot ctx */ 771 767 // TODO: Set slot context and other flags. (probably forgot a lot of 'em) 772 768 773 return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT, .slot_id = slot_id, .input_ctx = ictx );769 return xhci_cmd_sync_inline(hc, CONFIGURE_ENDPOINT, .slot_id = slot_id, .input_ctx = ictx_dma_buf); 774 770 } 775 771
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